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ICFP 2018
Sun 23 - Sat 29 September 2018 St. Louis, Missouri, United States
Sun 23 Sep 2018 15:55 - 16:20 at Illinois Central - Tools and Hardware Chair(s): Joachim Breitner

Clash compiles a semantic subset of Haskell to digital circuits. Which subset of Haskell you ask? Well… the subset that can reasonably be turned into an efficient digital circuit, and where the developer can remain in control of the performance of the circuit. We will show how to view a Haskell program as a description of a digital circuit and the cost model that you use to predict performance; which is quite a different cost model from the one you use when executing Haskell code on a CPU. As part of this, we will highlight some of the non-standard code transformations that Clash performs in order to improve the efficiency of the resulting circuit. Finally, we demonstrate some of recently added escape-hatches and other low-level tools in order to get that last drop of circuit performance, which include: an “FFI” to the Verilog hardware description language, custom bit-encoding for data-types, and user-extensible code-generation.

Slides (HIW2018.pdf)332KiB

Sun 23 Sep

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