The Workshop on Functional High-Performance Computing will be held on Saturday, September 29th, after ICFP’18 (24th-26th) and the Haskell Symposium and various workshops (27th-28th), in St. Louis, MO, USA
Sat 29 SepDisplayed time zone: Guadalajara, Mexico City, Monterrey change
08:45 - 10:00
|Welcome and Introductions|
|HELIX: A Case Study of a Formal Verification of High Performance Program Generation|
A: Vadim Zaliva Carnegie Mellon University, USA, A: Franz Franchetti Carnegie Mellon University, USADOI
10:20 - 12:15
|Modular Acceleration: Tricky Cases of Functional High-Performance Computing|
A: Troels Henriksen University of Copenhagen, Denmark, A: Martin Elsman University of Copenhagen, Denmark, A: Cosmin Oancea University of Copenhagen, DenmarkDOI
|Preventing Data Races with Refinement Types|
13:30 - 15:10
|An Efficient Compiler for Recursive Functions on Mostly-Serialized Data|
|Comparing strategies for lightweight threading based on continuations|
15:30 - 17:00
|Optimizing Data Parallelism with Linear Programming in Nessie|
FHPC 2018 Call for Papers
The 7th ACM SIGPLAN Workshop on Functional High-Performance Computing (FHPC 2018) is being held as in previous years in conjunction with the International Conference on Functional Programming (ICFP 2018) together with numerous other workshops/symposia, and as a first, colocated with Strange Loop, in St. Louis, MO, USA.
The FHPC 2018 workshop seeks to bring together researchers and practitioners exploring uses of functional (or more generally, declarative or high-level) programming systems or concepts in application domains where high performance is essential. The aim of the meeting is to enable sharing of results, experiences, and novel ideas about how high-level, declarative specifications of computationally challenging problems can serve as maintainable and portable code that approaches (or even exceeds) the performance of machine-oriented (low-level) imperative implementations.
All aspects of performance-critical programming and parallel programming are in scope for the workshop, irrespective of hardware target. This includes both traditional large-scale distributed-memory scientific computing (HPC), as well as work targeting single node systems with SMPs, GPUs, FPGAs, or embedded processors. FHPC 2018 seeks to encourage a range of submissions, focusing on work in progress and facilitating early exchange of ideas and open discussion on innovative and/or emerging results. Original research, experience reports, case studies, and evaluations of programming systems are all welcome. Work on incorporation of functional programming concepts into more traditional (imperative) HPC applications is explicitly solicited.
This year FHPC provides authors the opportunity to submit for evaluation any relevant artifacts that accompany their papers. The dissemination of artifacts promotes reproducibility, and enables authors to build on extant work, while it can also help to more unambiguously resolve questions about cases not considered by the original authors.
For the purpose of FHPC, we plan to reward selected artifacts with additional presentation time in a dedicated slot during the workshop, for example, for demonstrating (i) reproducibility of results or (ii) practical usage of the framework (visualization, demos, etc).
The artifact-evaluation committee (AEC) will accept any artifact that authors wish to submit. Obviously, the better the artifact is packaged, the more likely the AEC can actually work with it. We ask the authors to provide provide the title of the FHPC paper submission, together with three files:
- a .pdf file that provides detailed instructions to the reviewers about how to install the artifact and what to look for in the evaluations
- an archive .zip or .tar.gz containing the artifact
- the submitted FHPC paper (.pdf file)
The artifact evaluation process is intended to encourage an open and constructive communication (via HotCRP) between (anonymous) reviewers and authors.
Submission of an artifact does not constitute tacit permission to make its content public. AEC members will be instructed that they may not publicise any part of your artifact during or after completing evaluation, nor retain any part of it after evaluation. Thus, you are free to include models, data files, proprietary binaries, and similar items in your artifact. The AEC organisers strongly encourage you to anonymise any data files that you submit.
- 12 page limit, shorter papers welcome
- Latex format and instructions http://sigplan.org/Resources/Author/#acmart-format
- Paper submissions https://fhpc18.hotcrp.com/
The official publication date is the date the papers are made available in the ACM Digital Library. This date may be up to two weeks prior to the first day of the conference. The official publication date affects the deadline for any patent filings related to published work.
The proceedings of FHPC 2018 will be published in the ACM Digital Library.
- Call for papers broadcast: late March, 2018
- DEADLINE EXTENDED Submission Deadline: Midnight June 11, 2018 Anywhere on Earth.
- Notification: early July (TBD)
- Camera ready: August 5
- Final version of proceedings available: Sept. 9
- FHPC 2018: Saturday Sept. 29, 2018.
FHPC18 Call for Presentations and Demonstrations
In the workshop spirit, the refereed paper presentation program is being expanded to accommodate less formally reviewed presentations in the form of talks not based on accepted papers, and software demonstrations. Topic areas of interest include research or development in progress, experience reports, and position/“white paper” statements.
Proposals will be subject to a mild reviewing process to insure relevance and general interest to FHPC. We expect time slots to be between one-half and one hour.
Prospective presenters are requested to submit an abstract describing their proposed contribution via the paper submission site. The deadline is July 29, 2018, midnight anywhere on Earth, but the PC reserves the right to accept proposals at any time after submission. As such, early submission is strongly encouraged.